linux-kernel - Re: [RESEND PATCH v3 9/9] ARM: zynq: DT: Migrate UART to Cadence binding

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Message-ID: <53575DC4.6080008@monstr.eu>
Date:	Wed, 23 Apr 2014 08:29:24 +0200
From:	Michal Simek <monstr@...str.eu>
To:	Soren Brinkmann <soren.brinkmann@...inx.com>
CC:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Randy Dunlap <rdunlap@...radead.org>,
	Russell King <linux@....linux.org.uk>,
	Michal Simek <michal.simek@...inx.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jslaby@...e.cz>,
	Grant Likely <grant.likely@...aro.org>,
	Peter Crosthwaite <peter.crosthwaite@...inx.com>,
	One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-serial@...r.kernel.org
Subject: Re: [RESEND PATCH v3 9/9] ARM: zynq: DT: Migrate UART to Cadence
 binding

On 04/05/2014 02:23 AM, Soren Brinkmann wrote:
> The Zynq UART is Cadence IP and the driver has been renamed accordingly.
> Migrate the DT to use the new binding for the UART driver.
> 
> Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
> Acked-by: Peter Crosthwaite <peter.crosthwaite@...inx.com>
> Acked-by: Rob Herring <robh@...nel.org>
> Tested-by: Michal Simek <michal.simek@...inx.com>
> ---
> This change depends on 'tty: xuartps: Rebrand driver as Cadence UART',
> which introduces the new clock-names.
> 
> Changes in v3: None
> Changes in v2: None
> 
> Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
> ---
>  arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 789d0bacc110..d27eb5c21831 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -73,19 +73,19 @@
>  		};
>  
>  		uart0: uart@...00000 {
> -			compatible = "xlnx,xuartps";
> +			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>  			status = "disabled";
>  			clocks = <&clkc 23>, <&clkc 40>;
> -			clock-names = "ref_clk", "aper_clk";
> +			clock-names = "uart_clk", "pclk";
>  			reg = <0xE0000000 0x1000>;
>  			interrupts = <0 27 4>;
>  		};
>  
>  		uart1: uart@...01000 {
> -			compatible = "xlnx,xuartps";
> +			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>  			status = "disabled";
>  			clocks = <&clkc 24>, <&clkc 41>;
> -			clock-names = "ref_clk", "aper_clk";
> +			clock-names = "uart_clk", "pclk";
>  			reg = <0xE0001000 0x1000>;
>  			interrupts = <0 50 4>;
>  		};
> 

Applied to zynq/dt2 branch.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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