linux-kernel - Re: [PATCH 23/28] nios2: Nios2 registers

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Message-ID: <CAFiDJ5-S8bD7Z+5XcwUK_mZ+ShCMp5nj7km4NSn+Ecck3xnBxQ@mail.gmail.com>
Date:	Wed, 23 Apr 2014 15:10:26 +0800
From:	Ley Foon Tan <lftan@...era.com>
To:	Tobias Klauser <tklauser@...tanz.ch>
Cc:	Linux-Arch <linux-arch@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	cltang@...esourcery.com
Subject: Re: [PATCH 23/28] nios2: Nios2 registers

Hi Tobias


On Tue, Apr 22, 2014 at 8:39 PM, Tobias Klauser <tklauser@...tanz.ch> wrote:
> On 2014-04-18 at 14:27:06 +0200, Ley Foon Tan <lftan@...era.com> wrote:

>> +
>> +/* estatus register bits */
>> +#define ESTATUS_EPIE (1 << 0)        /* processor interrupt enable */
>> +#define ESTATUS_EU   (1 << 1)        /* user mode */
>> +#define ESTATUS_EH   (1 << 2)        /* Exception mode */
>> +
>> +/* tlbmisc register bits */
>> +#define TLBMISC_PID_SHIFT    4
>> +#define TLBMISC_PID_MASK     ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
>
> You should probably #include <asm/cpuinfo.h> here since struct cpuinfo
> is used in the definition.
Okay, but I think we should add #ifndef __ASSEMBLY__ at #include
<asm/cpuinfo.h> and at line #define TLBMISC_PID_MASK.
Assembly source file might include this file as well.

>
>> +#define TLBMISC_WAY_MASK     0xf
>> +#define TLBMISC_WAY_SHIFT    20
>> +
>> +#define TLBMISC_PID  (TLBMISC_PID_MASK << TLBMISC_PID_SHIFT) /* TLB PID */
>> +#define TLBMISC_WE   (1 << 18)       /* TLB write enable */
>> +#define TLBMISC_RD   (1 << 19)       /* TLB read */
>> +#define TLBMISC_WAY  (TLBMISC_WAY_MASK << TLBMISC_WAY_SHIFT) /* TLB way */
>> +
>> +#endif /* _ASM_NIOS2_REGISTERS_H */

>>
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