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Message-ID: <535A156F.6060004@linaro.org>
Date:	Fri, 25 Apr 2014 13:27:35 +0530
From:	Tushar Behera <tushar.behera@...aro.org>
To:	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Vivek Gautam <gautam.vivek@...sung.com>
CC:	linux-usb@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	kishon@...com, gregkh@...uxfoundation.org, balbi@...com,
	kgene.kim@...sung.com, t.figa@...sung.com, k.debski@...sung.com,
	jg1.han@...sung.com
Subject: Re: [PATCH V4 1/5] phy: Add new Exynos5 USB 3.0 PHY driver

On 04/14/2014 08:07 PM, Sylwester Nawrocki wrote:
> On 08/04/14 16:36, Vivek Gautam wrote:
>> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> index 28f9edb..6d99ba9 100644
>> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> @@ -74,3 +74,45 @@ phy-consumer@...40000 {
>>  
>>  Refer to DT bindings documentation of particular PHY consumer devices for more
>>  information about required PHYs and the way of specification.
>> +
>> +Samsung Exynos5 SoC series USB DRD PHY controller
>> +--------------------------------------------------
>> +
>> +Required properties:
>> +- compatible : Should be set to one of the following supported values:
>> +	- "samsung,exynos5250-usbdrd-phy" - for exynos5250 SoC,
>> +	- "samsung,exynos5420-usbdrd-phy" - for exynos5420 SoC.
>> +- reg : Register offset and length of USB DRD PHY register set;
>> +- clocks: Clock IDs array as required by the controller
>> +- clock-names: names of clocks correseponding to IDs in the clock property;
>> +	       Required clocks:
>> +	- phy: main PHY clock (same as USB DRD controller i.e. DWC3 IP clock),
>> +	       used for register access.
>> +	- ref: PHY's reference clock (usually crystal clock), associated by
>> +	       phy name, used to determine bit values for clock settings
>> +	       register.
>> +	Additional clock required for Exynos5420:
>> +	- usb30_sclk_100m: Additional special clock used for PHY operation
>> +			   depicted as 'sclk_usbphy30' in CMU of Exynos5420.
>> +- samsung,syscon-phandle: phandle for syscon interface, which is used to
>> +			  control pmu registers for power isolation.
> 
> Why to append "-phandle" to the property's name ? If this is for PMU
> perhaps make it more explicit and name it: samsung,pmu-syscon or
> samsung,pmureg ?
> 

There are already a couple of nodes (watchdog and sata) using
samsung,syscon-phandle. IMHO, we should keep only property string for
syscon node. Either we keep syscon-phandle here or change sata/watchdog
driver to use the modified property name.

-- 
Tushar Behera
--
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