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Date:	Fri, 25 Apr 2014 12:45:16 +0300
From:	Mika Westerberg <mika.westerberg@...ux.intel.com>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	Linus Walleij <linus.walleij@...aro.org>,
	Mathias Nyman <mathias.nyman@...ux.intel.com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Grant Likely <grant.likely@...aro.org>,
	"H. Peter Anvin" <hpa@...ux.intel.com>,
	Ingo Molnar <mingo@...e.hu>,
	"Jin, Yao" <yao.jin@...ux.intel.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"Krogerus, Heikki" <heikki.krogerus@...el.com>
Subject: Re: [PATCH] pinctrl-baytrail: workaround for irq descriptor conflict
 on ASUS T100TA

On Thu, Apr 24, 2014 at 04:40:25PM +0200, Thomas Gleixner wrote:
> On Thu, 24 Apr 2014, Linus Walleij wrote:
> > On Thu, Apr 24, 2014 at 9:25 AM, Thomas Gleixner <tglx@...utronix.de> wrote:
> > 
> > > I'm traveling until friday, so please wait before you commit that
> > > fugly hack. I'll have a closer look how we can handle that at the core
> > > level.
> > 
> > Thanks a *lot* Thomas, I'll stand by for action.
> 
> Find an untested patch below. It should cure the issue.
> 
> I went through all code which can be affected by this and except for
> some other places, which might erroneously allocate inside the
> hardwired space, I can't see any possible fallout.
> 
> Thanks,
> 
> 	tglx
> 
> -------------------->
> 
> Subject: genirq: x86: Ensure that dynamic irq allocation does not conflict
> From: Thomas Gleixner <tglx@...utronix.de>
> Date: Thu, 24 Apr 2014 09:50:53 +0200
> 
> On x86 the allocation of irq descriptors may allocate interrupts which
> are in the range of the GSI interrupts. That's wrong as those
> interrupts are hardwired and we don't have the irq domain translation
> like PPC. So one of these interrupts can be hooked up later to one of
> the devices which are hard wired to it and the io_apic init code for
> that particular interrupt line happily reuses that descriptor with a
> completely different configuration so hell breaks lose.
> 
> Inside x86 we allocate dynamic interrupts from above nr_gsi_irqs,
> except for a few usage sites which have not yet blown up in our face
> for whatever reason. But for drivers which need an irq range, like the
> GPIO drivers, we have no limit in place and we don't want to expose
> such a detail to a driver.
> 
> To cure this introduce a function which an architecture can implement
> to impose a lower bound on the dynamic interrupt allocations.
> 
> Implement it for x86 and set the lower bound to nr_gsi_irqs, which is
> the end of the hardwired interrupt space, so all dynamic allocations
> happen above.
> 
> That not only allows the GPIO driver to work sanely, it also protects
> the bogus callsites of create_irq_nr() in hpet, uv, irq_remapping and
> htirq code. They need to be cleaned up as well, but that's a separate
> issue.
> 
> Signed-off-by: Thomas Gleixner <tglx@...utronix.de>

Works here on my T100,

Tested-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
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