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Message-ID: <1399383244-14556-8-git-send-email-kishon@ti.com>
Date:	Tue, 6 May 2014 19:03:53 +0530
From:	Kishon Vijay Abraham I <kishon@...com>
To:	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-omap@...r.kernel.org>, <linux-pci@...r.kernel.org>
CC:	<rogerq@...com>, <balajitk@...com>, Keerthy <j-keerthy@...com>,
	Rajendra Nayak <rnayak@...com>, Tero Kristo <t-kristo@...com>,
	Paul Walmsley <paul@...an.com>,
	Kishon Vijay Abraham I <kishon@...com>
Subject: [PATCH 07/17] ARM: dts: DRA7: Add divider table to optfclk_pciephy_div clock

From: Keerthy <j-keerthy@...com>

Add divider table to optfclk_pciephy_div clock. The Documentation
for divider clock can be found at ../clock/ti/divider.txt

Cc: Rajendra Nayak <rnayak@...com>
Cc: Tero Kristo <t-kristo@...com>
Cc: Paul Walmsley <paul@...an.com>
Signed-off-by: Keerthy <j-keerthy@...com>
Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
---
 arch/arm/boot/dts/dra7xx-clocks.dtsi |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index c767687..55e95c5 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1170,6 +1170,7 @@
 		clocks = <&apll_pcie_ck>;
 		#clock-cells = <0>;
 		reg = <0x021c>;
+		ti,dividers = <2>, <1>;
 		ti,bit-shift = <8>;
 		ti,max-div = <2>;
 	};
-- 
1.7.9.5

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