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Message-ID: <20140509091824.GL3693@n2100.arm.linux.org.uk>
Date: Fri, 9 May 2014 10:18:24 +0100
From: Russell King - ARM Linux <linux@....linux.org.uk>
To: Nicolas Pitre <nicolas.pitre@...aro.org>
Cc: Doug Anderson <dianders@...omium.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Will Deacon <will.deacon@....com>,
John Stultz <john.stultz@...aro.org>,
David Riley <davidriley@...omium.org>,
"olof@...om.net" <olof@...om.net>,
Sonny Rao <sonnyrao@...omium.org>,
Richard Zhao <richard.zhao@...aro.org>,
Santosh Shilimkar <santosh.shilimkar@...com>,
Shawn Guo <shawn.guo@...aro.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Marc Zyngier <marc.zyngier@....com>,
Stephen Warren <swarren@...dia.com>,
Paul Gortmaker <paul.gortmaker@...driver.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: Don't ever downscale loops_per_jiffy in SMP
systems#
On Thu, May 08, 2014 at 09:37:15PM -0400, Nicolas Pitre wrote:
> On Thu, 8 May 2014, Russell King - ARM Linux wrote:
>
> > If you're in a preempt or SMP environment, provide a timer for udelay().
> > IF you're in an environment with IRQs which can take a long time, use
> > a timer for udelay(). If you're in an environment where the CPU clock
> > can change unexpectedly, use a timer for udelay().
>
> Longer delays are normally not a problem. If they are, then simply
> disabling IRQs may solve it if absolutely required. With much shorter
> delays than expected this is another story.
>
> What about the following:
>
> diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
> index 7c4fada440..10030cc5a0 100644
> --- a/arch/arm/kernel/smp.c
> +++ b/arch/arm/kernel/smp.c
> @@ -682,6 +682,15 @@ static int cpufreq_callback(struct notifier_block *nb,
> cpufreq_scale(per_cpu(l_p_j_ref, cpu),
> per_cpu(l_p_j_ref_freq, cpu),
> freq->new);
> + /*
> + * Another CPU might have called udelay() just before LPJ
> + * and a shared CPU clock is increased. That other CPU still
> + * looping on the old LPJ value would return significantly
> + * sooner than expected. The actual fix is to provide a
> + * timer based udelay() implementation instead.
> + */
> + if (freq->old < freq->new)
> + pr_warn_once("*** udelay() on SMP is racy and may be much shorter than expected ***\n");
> }
> return NOTIFY_OK;
> }
No, because you're assuming this is just a SMP problem. What about
preempt, where you could preempt away from a udelay loop to change
the CPU frequency, and then back again, possibly resulting in the
CPU clock rate increasing and maybe a shorter delay if the switch
from-change-clock-and-back is fast enough? Remember that udelay()
can be used for up to 2ms delays.
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