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Message-Id: <751695A1-0A84-47AE-B3EC-81A1F5C14101@codeaurora.org>
Date:	Fri, 9 May 2014 12:21:57 -0700
From:	Kumar Gala <galak@...eaurora.org>
To:	srinivas.kandagatla@...aro.org
Cc:	Mike Turquette <mturquette@...aro.org>,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: add clocks necessary for apq8064 sdcc


On May 9, 2014, at 11:48 AM, srinivas.kandagatla@...aro.org wrote:

> From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> 
> This patch adds clocks necessary for SD card controller on apq8064 SOC.
> Without this patch the clocks are visible to the sdcc driver.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> ---
> drivers/clk/qcom/gcc-msm8960.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
> index f4ffd91..9bd3238 100644
> --- a/drivers/clk/qcom/gcc-msm8960.c
> +++ b/drivers/clk/qcom/gcc-msm8960.c
> @@ -2876,6 +2876,16 @@ static struct clk_regmap *gcc_apq8064_clks[] = {
> 	[GSBI7_QUP_SRC] = &gsbi7_qup_src.clkr,
> 	[GSBI7_QUP_CLK] = &gsbi7_qup_clk.clkr,
> 	[GSBI7_H_CLK] = &gsbi7_h_clk.clkr,
> +	[SDC1_SRC] = &sdc1_src.clkr,
> +	[SDC1_CLK] = &sdc1_clk.clkr,
> +	[SDC2_SRC] = &sdc2_src.clkr,
> +	[SDC2_CLK] = &sdc2_clk.clkr,
> +	[SDC3_SRC] = &sdc3_src.clkr,
> +	[SDC3_CLK] = &sdc3_clk.clkr,
> +	[SDC4_SRC] = &sdc4_src.clkr,
> +	[SDC4_CLK] = &sdc4_clk.clkr,
> +	[SDC5_SRC] = &sdc5_src.clkr,
> +	[SDC5_CLK] = &sdc5_clk.clkr,
> };

There are only 4 SDCs on APQ8064

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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