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Message-Id: <1399668248-24199-3-git-send-email-david.e.box@linux.intel.com>
Date:	Fri,  9 May 2014 13:44:06 -0700
From:	"David E. Box" <david.e.box@...ux.intel.com>
To:	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com, x86@...nel.org
Cc:	Ong Boon Leong <boon.leong.ong@...el.com>,
	rafael.j.wysocki@...el.com, linux-kernel@...r.kernel.org,
	kristen.c.accardi@...el.com, david.e.box@...ux.intel.com,
	jacob.jun.pan@...ux.intel.com
Subject: [PATCH v4 2/4] arch: x86: added Quark MBI support

From: Ong Boon Leong <boon.leong.ong@...el.com>

Added all the MBI units below and their associated read/write
opcodes:
 - Host Bridge Arbiter
 - Host Bridge
 - Remote Management Unit
 - Memory Manager & eSRAM
 - SoC Unit

Signed-off-by: Ong Boon Leong <boon.leong.ong@...el.com>
Signed-off-by: David E. Box <david.e.box@...ux.intel.com>
---
 arch/x86/include/asm/iosf_mbi.h |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/x86/include/asm/iosf_mbi.h b/arch/x86/include/asm/iosf_mbi.h
index 1a91a36..57995f0 100644
--- a/arch/x86/include/asm/iosf_mbi.h
+++ b/arch/x86/include/asm/iosf_mbi.h
@@ -50,6 +50,28 @@
 #define BT_MBI_PCIE_READ	0x00
 #define BT_MBI_PCIE_WRITE	0x01
 
+/* Quark available units */
+#define QRK_MBI_UNIT_HBA	0x00
+#define QRK_MBI_UNIT_HB	0x03
+#define QRK_MBI_UNIT_RMU	0x04
+#define QRK_MBI_UNIT_MM	0x05
+#define QRK_MBI_UNIT_MMESRAM	0x05
+#define QRK_MBI_UNIT_SOC	0x31
+
+/* Quark read/write opcodes */
+#define QRK_MBI_HBA_READ	0x10
+#define QRK_MBI_HBA_WRITE	0x11
+#define QRK_MBI_HB_READ	0x10
+#define QRK_MBI_HB_WRITE	0x11
+#define QRK_MBI_RMU_READ	0x10
+#define QRK_MBI_RMU_WRITE	0x11
+#define QRK_MBI_MM_READ	0x10
+#define QRK_MBI_MM_WRITE	0x11
+#define QRK_MBI_MMESRAM_READ	0x12
+#define QRK_MBI_MMESRAM_WRITE	0x13
+#define QRK_MBI_SOC_READ	0x06
+#define QRK_MBI_SOC_WRITE	0x07
+
 #if IS_ENABLED(CONFIG_IOSF_MBI)
 
 bool iosf_mbi_available(void);
-- 
1.7.10.4

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