lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 13 May 2014 22:50:45 +0200 From: Peter Zijlstra <peterz@...radead.org> To: Hans-Christian Egtvedt <egtvedt@...fundet.no> Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org, torvalds@...ux-foundation.org, akpm@...ux-foundation.org, mingo@...nel.org, will.deacon@....com, paulmck@...ux.vnet.ibm.com, Haavard Skinnemoen <hskinnemoen@...il.com> Subject: Re: [PATCH 06/20] arch,avr32: Fold atomic_ops On Tue, May 13, 2014 at 10:40:32PM +0200, Hans-Christian Egtvedt wrote: > Probably found the reason why we want to use sub with the signed 21-bit > limit, it uses one less register than the add instruction that can add up to > 32-bit values. > > Both instructions are 32-bit, to use a 16-bit instruction the immediate is > very small; 4 bit. > > sub 32-bit, type IV, takes a register and subtracts a 21-bit immediate. > add 32-bit, type II, adds two register values together. > > So by simplifying you loose this optimization. OK, let me try if I can come up with anything sane for this. Re, adding atomic_{or,and,xor}() those should all use the same bits as add, right, except for the special case using sub. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists