[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20140513233645.GN3693@n2100.arm.linux.org.uk>
Date: Wed, 14 May 2014 00:36:45 +0100
From: Russell King - ARM Linux <linux@....linux.org.uk>
To: Nicolas Pitre <nicolas.pitre@...aro.org>
Cc: Stephen Warren <swarren@...dotorg.org>,
Doug Anderson <dianders@...omium.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Will Deacon <will.deacon@....com>,
John Stultz <john.stultz@...aro.org>,
David Riley <davidriley@...omium.org>,
"olof@...om.net" <olof@...om.net>,
Sonny Rao <sonnyrao@...omium.org>,
Santosh Shilimkar <santosh.shilimkar@...com>,
Shawn Guo <shawn.guo@...aro.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Marc Zyngier <marc.zyngier@....com>,
Stephen Warren <swarren@...dia.com>,
Paul Gortmaker <paul.gortmaker@...driver.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: Don't ever downscale loops_per_jiffy in SMP
systems#
On Tue, May 13, 2014 at 07:29:52PM -0400, Nicolas Pitre wrote:
> On Tue, 13 May 2014, Nicolas Pitre wrote:
>
> > On Tue, 13 May 2014, Stephen Warren wrote:
> >
> > > On 05/13/2014 03:50 PM, Doug Anderson wrote:
> > > ...
> > > > ...but then I found the true problem shows up when we transition
> > > > between very low frequencies on exynos, like between 200MHz and
> > > > 300MHz. While transitioning between frequencies the system
> > > > temporarily bumps over to the "switcher" PLL running at 800MHz while
> > > > waiting for the main PLL to stabilize. No CPUFREQ notification is
> > > > sent for that. That means there's a period of time when we're running
> > > > at 800MHz but loops_per_jiffy is calibrated at between 200MHz and
> > > > 300MHz.
> > > >
> > > >
> > > > I'm welcome to any suggestions for how to address this. It sorta
> > > > feels like it would be a common thing to have a temporary PLL during
> > > > the transition, ...
> > >
> > > We definitely do that on Tegra for some cpufreq transitions.
> >
> > Ouch... If this is a common strategy to use a third frequency during a
> > transition phase, especially if that frequency is way off (800MHz vs
> > 200-300MHz) then it is something the cpufreq layer must capture and
> > advertise.
>
> Of course if only the loops_per_jiffy scaling does care about frequency
> changes these days, and if in those cases udelay() can instead be moved
> to a timer source on those hick-up prone platforms, then all this is
> fairly theoretical and may not be worth pursuing.
As I've been saying... use a bloody timer. :)
--
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists