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Message-ID: <CACRpkdY6QLpJQuNqC4qqsPWgVTxF8NiGd=eWUEWRkzdh68j9_A@mail.gmail.com>
Date: Tue, 13 May 2014 09:19:19 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc: Russell King <linux@....linux.org.uk>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
Chris Ball <chris@...ntf.net>,
Ulf Hansson <ulf.hansson@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
agross@...cinc.com,
"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant
On Tue, Apr 29, 2014 at 10:19 AM, <srinivas.kandagatla@...aro.org> wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
>
> Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
> register. Bit postion datactrl[16:4] hold the true block size instead of power
> of 2.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
This is probably something I got wrong when I attempted to use
this driver on the Dragon board. Now I see what I missed...
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
Yours,
Linus Walleij
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