linux-kernel - Re: [PATCH v4 1/6] clocksource: Add support for the Mediatek SoCs

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Date:	Wed, 14 May 2014 10:29:38 -0700
From:	Sören Brinkmann <soren.brinkmann@...inx.com>
To:	Matthias Brugger <matthias.bgg@...il.com>
CC:	<linux-kernel@...r.kernel.org>, <robh+dt@...nel.org>,
	<pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<rdunlap@...radead.org>, <linux@....linux.org.uk>,
	<daniel.lezcano@...aro.org>, <tglx@...utronix.de>,
	<thierry.reding@...il.com>, <florian.vaussard@...l.ch>,
	<jic23@...nel.org>, <jason@...edaemon.net>, <andrew@...n.ch>,
	<silvio.fricke@...il.com>, <heiko.stuebner@...com>,
	<olof@...om.net>, <sebastian.hesselbarth@...il.com>,
	<sboyd@...eaurora.org>, <gregory.clement@...e-electrons.com>,
	<arnd@...db.de>, <robherring2@...il.com>, <marc.zyngier@....com>,
	<maxime.ripard@...e-electrons.com>, <devicetree@...r.kernel.org>,
	<linux-doc@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v4 1/6] clocksource: Add support for the Mediatek SoCs

Hi Matthias,

just a few suggestions below. Nothing serious.

On Wed, 2014-05-14 at 07:12PM +0200, Matthias Brugger wrote:
> This patch adds a clock source and clock event for the timer found
> on the Mediatek SoCs.
> 
> The Mediatek General Porpose Timer block provides five 32 bit timers and
> one 64 bit timer.
> 
> Two 32 bit timers are used:
> TIMER1: clock events supporting periodic and oneshot events
> TIMER2: clock source configured as a free running counter

It is pretty common, I think, to use the free running counter also as
sched_clock. You probably want to look into this, but that's just a
possible enhancement.

[...]
> +static void __init mtk_timer_init(struct device_node *node)
> +{
> +	struct mtk_clock_event_device *evt;
> +	struct resource res;
> +	unsigned long rate = 0;
> +	struct clk *clk;
> +	int ret;
> +	u32 val;
> +
> +	evt = kzalloc(sizeof(*evt), GFP_KERNEL);
> +	if (!evt)
> +		panic("Can't allocate mtk clock event driver struct");

I'm not that sure about the A7s, but on Cortex-A9 there is also a global
timer which can be used for timing. And there might be other timing
options for this SOC too. Do you really want to panic?

	Sören
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