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Message-ID: <5373C484.8050506@gmail.com>
Date:	Wed, 14 May 2014 21:31:16 +0200
From:	Tomasz Figa <tomasz.figa@...il.com>
To:	Chanwoo Choi <cw00.choi@...sung.com>, kgene.kim@...sung.com,
	t.figa@...sung.com
CC:	Mark Rutland <mark.rutland@....com>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	tushar.behera@...aro.org, sajjan.linux@...il.com,
	linux-samsung-soc@...r.kernel.org, linux@....linux.org.uk,
	Pawel Moll <pawel.moll@....com>, sachin.kamat@...aro.org,
	Jaehoon Chung <jh80.chung@...sung.com>,
	thomas.abraham@...aro.org, devicetree@...r.kernel.org,
	arnd@...db.de, Ian Campbell <ijc+devicetree@...lion.org.uk>,
	marc.zyngier@....com, inki.dae@...sung.com,
	Rob Herring <robh+dt@...nel.org>, ben-linux@...ff.org,
	Mike Turquette <mturquette@...aro.org>,
	linux-arm-kernel@...ts.infradead.org,
	Karol Wrona <k.wrona@...sung.com>, hyunhee.kim@...sung.com,
	sw0312.kim@...sung.com, linux-kernel@...r.kernel.org,
	yj44.cho@...sung.com, kyungmin.park@...sung.com,
	Kumar Gala <galak@...eaurora.org>, olof@...om.net,
	chanho61.park@...sung.com
Subject: Re: [PATCHv5 3/5] clk: samsung: exynos3250: Add clocks using common
 clock framework

Hi Chanwoo,

On 13.05.2014 15:05, Chanwoo Choi wrote:
> From: Tomasz Figa <t.figa@...sung.com>
> 
> This patch add new the clock drvier of Exynos3250 SoC based on Cortex-A7
> using common clock framework. The CMU (Clock Management Unit) of Exynos3250
> control PLLs(Phase Locked Loops) and generate system clocks for CPU, buses,
> and function clocks for individual IPs.

Applied with few minor fixups.

Best regards,
Tomasz
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