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Message-Id: <1400098522-14770-11-git-send-email-sebastian.hesselbarth@gmail.com>
Date: Wed, 14 May 2014 22:15:21 +0200
From: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Mike Turquette <mturquette@...aro.org>,
Jisheng Zhang <jszhang@...vell.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 10/10] ARM: dts: berlin: convert BG2Q to DT clock nodes
From: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
This converts Berlin BG2Q SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
---
Changelog:
v1->v2:
- initial version
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Pawel Moll <pawel.moll@....com>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Ian Campbell <ijc+devicetree@...lion.org.uk>
Cc: Kumar Gala <galak@...eaurora.org>
Cc: Mike Turquette <mturquette@...aro.org>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Jisheng Zhang <jszhang@...vell.com>
Cc: devicetree@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
---
arch/arm/boot/dts/berlin2q.dtsi | 80 ++++++++++++++++++++++++++++-------------
1 file changed, 56 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 52c7d644e492..8128c2b5ac07 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -6,6 +6,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <dt-bindings/clock/berlin2q.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -47,28 +48,16 @@
};
};
- smclk: sysmgr-clock {
+ refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
- cfgclk: config-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
-
- cpuclk: cpu-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1200000000>;
- };
-
twdclk: twdclk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
- clocks = <&cpuclk>;
+ clocks = <&cpupll>;
clock-mult = <1>;
clock-div = <3>;
};
@@ -106,6 +95,13 @@
#interrupt-cells = <3>;
};
+ cpupll: cpupll@...170 {
+ compatible = "marvell,berlin2q-pll";
+ clocks = <&refclk>;
+ #clock-cells = <0>;
+ reg = <0xdd0170 0x8>;
+ };
+
apb@...000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -189,7 +185,7 @@
timer0: timer@...0 {
compatible = "snps,dw-apb-timer";
reg = <0x2c00 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
interrupts = <8>;
};
@@ -197,7 +193,7 @@
timer1: timer@...4 {
compatible = "snps,dw-apb-timer";
reg = <0x2c14 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -205,7 +201,7 @@
timer2: timer@...8 {
compatible = "snps,dw-apb-timer";
reg = <0x2c28 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -213,7 +209,7 @@
timer3: timer@...c {
compatible = "snps,dw-apb-timer";
reg = <0x2c3c 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -221,7 +217,7 @@
timer4: timer@...0 {
compatible = "snps,dw-apb-timer";
reg = <0x2c50 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -229,7 +225,7 @@
timer5: timer@...4 {
compatible = "snps,dw-apb-timer";
reg = <0x2c64 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -237,7 +233,7 @@
timer6: timer@...8 {
compatible = "snps,dw-apb-timer";
reg = <0x2c78 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -245,7 +241,7 @@
timer7: timer@...c {
compatible = "snps,dw-apb-timer";
reg = <0x2c8c 0x14>;
- clocks = <&cfgclk>;
+ clocks = <&coreclk CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -290,11 +286,47 @@
};
};
+ syspll: syspll@...030 {
+ compatible = "marvell,berlin2q-pll";
+ clocks = <&refclk>;
+ #clock-cells = <0>;
+ reg = <0xea0030 0x8>;
+ };
+
+ coreclk: core-clock@...0e8 {
+ compatible = "marvell,berlin2q-core-clocks";
+ #clock-cells = <1>;
+ reg = <0xea00e8 0x18>;
+ clocks = <&refclk>, <&syspll>;
+ clock-names = "refclk", "syspll";
+ clock-output-names = "sys", "drmfigo", "cfg",
+ "gfx2d", "zsp", "perif", "pcube", "vscope",
+ "nfc_ecc", "vpp", "app", "gfx2daxi", "geth0",
+ "ahbapb", "usb0", "usb1", "usb2", "usb3",
+ "pbridge", "sdio", "nfc", "smemc", "pcie";
+ };
+
generic-regs@...110 {
compatible = "marvell,berlin-generic-regs", "syscon";
reg = <0xea0110 0x10>;
};
+ sdio0xin_clk: sdio0xinclk@...158 {
+ compatible = "marvell,berlin2-clk-div";
+ #clock-cells = <0>;
+ reg = <0xea0158 0x4>;
+ clocks = <&syspll>;
+ clock-names = "mux_bypass";
+ };
+
+ sdio1xin_clk: sdio1xinclk@...15c {
+ compatible = "marvell,berlin2-clk-div";
+ #clock-cells = <0>;
+ reg = <0xea015c 0x4>;
+ clocks = <&syspll>;
+ clock-names = "mux_bypass";
+ };
+
apb@...000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -308,7 +340,7 @@
reg = <0x9000 0x100>;
interrupt-parent = <&sic>;
interrupts = <8>;
- clocks = <&smclk>;
+ clocks = <&refclk>;
reg-shift = <2>;
status = "disabled";
};
@@ -318,7 +350,7 @@
reg = <0xa000 0x100>;
interrupt-parent = <&sic>;
interrupts = <9>;
- clocks = <&smclk>;
+ clocks = <&refclk>;
reg-shift = <2>;
status = "disabled";
};
--
1.9.1
--
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