linux-kernel - Re: [rfc]pwm: add xilinx pwm driver

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Message-ID: <5374A55A.4080906@thomasmore.be>
Date:	Thu, 15 May 2014 13:30:34 +0200
From:	Bart Tanghe <bart.tanghe@...masmore.be>
To:	Michal Simek <michal.simek@...inx.com>,
	Arnd Bergmann <arnd@...db.de>
CC:	thierry.reding@...il.com, robh+dt@...nel.org, pawel.moll@....com,
	mark.rutland@....com, ijc+devicetree@...lion.org.uk,
	galak@...eaurora.org, rob@...dley.net, grant.likely@...aro.org,
	linux-pwm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [rfc]pwm: add xilinx pwm driver



On 05/15/2014 12:33 PM, Michal Simek wrote:
> On 05/15/2014 10:50 AM, Bart Tanghe wrote:
>> On 05/15/2014 09:23 AM, Arnd Bergmann wrote:
>>> On Wednesday 14 May 2014 13:26:13 Bart Tanghe wrote:
>>>> @@ -0,0 +1,20 @@
>>>> +Xilinx PWM controller
>>>> +
>>>> +Required properties:
>>>> +- compatible: should be "xlnx,pwm-xlnx"
>>>> +- add a clock source to the description
>>>> +
>>>> +Examples:
>>>> +
>>>> +               axi_timer_0: timer@...00000 {
>>>> +                       clock-frequency = <100000000>;
>>>> +                       clocks = <&clkc 15>;
>>>> +                       compatible = "xlnx,xlnx-pwm";
>>>> +                       reg = <0x42800000 0x10000>;
>>>> +                       xlnx,count-width = <0x20>;
>>>> +                       xlnx,gen0-assert = <0x1>;
>>>> +                       xlnx,gen1-assert = <0x1>;
>>>> +                       xlnx,one-timer-only = <0x0>;
>>>> +                       xlnx,trig0-assert = <0x1>;
>>>> +                       xlnx,trig1-assert = <0x1>;
>>>> +               } ;
>>>>
>>>
>>> It seems you are missing a mandatory "#pwm-cells" property.
>>> How is anybody supposed to use this?
>>>
>>>      Arnd
>>>
>>
>> I've added some additional information in the documentation
>>
>>
>>
>> Xilinx PWM controller
>>
>> This driver works together with the Xilinx Axi timer hardware core.
>> The core is available for the microblaze, powerpc and arm based Xilinx
>> platforms.
>>
>> The axi timer core is implemented in the pl (programmable logic) of the
>> fpga. The amount is user defined. Each core has two timers and one pwm output.
>
> For PWM you have to have 2 timers but core itself can be configured
> to any configuration and I expect that any output has to be used.
>
> Can you describe me your testing enviroment with zedboard?
> Do you use any additional hw or are using just leds or any device
> on zedboard?
>
> Thanks,
> Michal
>
>

I'm using the 2 internal timers of the axi_timer core. I've attached the 
pwm output of the timer core to one of the leds. The generate out0 and 
generate out1 signals aren't attached.
I've added 4 axi timers to the design, so I can use the 4 leds of 
zedboard to visualize and measure the pwm signal.

Regards,

Bart
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