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Message-ID: <20140515023455.GB1873@two.firstfloor.org>
Date: Thu, 15 May 2014 04:34:55 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Stephane Eranian <eranian@...gle.com>
Cc: Don Zickus <dzickus@...hat.com>, Andi Kleen <andi@...stfloor.org>,
LKML <linux-kernel@...r.kernel.org>,
Ingo Molnar <mingo@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
Jiri Olsa <jolsa@...hat.com>, Joe Mario <jmario@...hat.com>
Subject: Re: Haswell mem-store question
> I think it should do:
>
> if (status & 1)
> dse.mem_lvl = PERF_MEM_LVL_L1|PERF_MEM_LVL_HIT;
> else
> dse.mem_lvl = PERF_MEM_LVL_L1|PERF_MEM_LVL_MISS;
>
> Otherwise you have L1 as the level with no hit/miss info.
Agreed.
BTW the line before is also not always corect, and any event not
explicitely store can only fill in NA
-Andi
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