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Message-Id: <1400161226-24067-1-git-send-email-heikki.krogerus@linux.intel.com>
Date: Thu, 15 May 2014 16:40:22 +0300
From: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
To: "Rafael J. Wysocki" <rjw@...ysocki.net>
Cc: Mike Turquette <mturquette@...aro.org>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Jin Yao <yao.jin@...ux.intel.com>,
Li Aubrey <aubrey.li@...ux.intel.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCHv2 0/4] ACPI / LPSS: Solution for two issues seen on Asus T100
Changes since v1:
- now using do_div() in clk_fd_recalc_rate() as suggested by Andy
- NULL checks for clk_name allocation in acpi_lpss.c
This combines two patch sets for LPSS that I had already send for
review separately. They conflicted with each other.
The first two patches will fix a problem were the context of the
private LPSS registers is lost when entering D3. The last two will add
support for the M/N dividers on LPSS by adding a new basic clock type
for fractional dividers. The UART driver needs support for it in order
to get clock rates that suit the requested baud rates.
Heikki Krogerus (4):
ACPI / PM: Export rest of the subsys functions
ACPI / LPSS: custom power domain for LPSS
clk: new basic clk type for fractional divider
ACPI / LPSS: support for fractional divider clock
drivers/acpi/acpi_lpss.c | 204 ++++++++++++++++++++++++++++++-----
drivers/acpi/device_pm.c | 2 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-fractional-divider.c | 135 +++++++++++++++++++++++
include/linux/acpi.h | 4 +
include/linux/clk-provider.h | 31 ++++++
6 files changed, 349 insertions(+), 28 deletions(-)
create mode 100644 drivers/clk/clk-fractional-divider.c
--
2.0.0.rc2
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