lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <53742B55.1060507@lge.com>
Date:	Thu, 15 May 2014 11:49:57 +0900
From:	Gioh Kim <gioh.kim@....com>
To:	Russell King <linux@....linux.org.uk>,
	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel@...r.kernel.org, Barry Song <Baohua.Song@....com>,
	Santosh Shilimkar <santosh.shilimkar@...com>
CC:	"ÀÌ°ÇÈ£/Ã¥ÀÓ¿¬±¸¿ø/SW Platform(¿¬)AOTÆÀ(gunho.lee@....com)" <gunho.lee@....com>,
	gurugio@...il.com
Subject: [PATCH] [RFC] ARM: MM: remove phy_base field of struct

Hi,

It's not a big deal but I've found that phy_base field of struct
l2x0_regs is not used anywhere.
I've removed it on my board. It seems to be working fine.

Why do we need physical address of L2 cache controller?
Is it removable?


------------------------ 8< --------------------------
>From cc0d98f4ef8b6f8f139a7c6179ed0b03e9ad7d07 Mon Sep 17 00:00:00 2001
From: Gioh Kim <gioh.kim@....com>
Date: Thu, 15 May 2014 11:26:20 +0900
Subject: [PATCH] [RFC] ARM: MM: remove phy_base field of struct l2x0_regs

Remove unused field, phy_base of struct l2x0_regs

Signed-off-by: Gioh Kim <gioh.kim@....com>
---
 arch/arm/include/asm/hardware/cache-l2x0.h |    1 -
 arch/arm/kernel/asm-offsets.c              |    1 -
 arch/arm/mm/cache-l2x0.c                   |    2 --
 3 files changed, 4 deletions(-)

diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h
b/arch/arm/include/asm/hardware/cache-l2x0.h
index 6795ff7..6dec6da 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -118,7 +118,6 @@ static inline int l2x0_of_init(u32 aux_val, u32
aux_mask)
 #endif

 struct l2x0_regs {
-       unsigned long phy_base;
        unsigned long aux_ctrl;
        /*
         * Whether the following registers need to be saved/restored
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 85598b5..9b0ff94 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -100,7 +100,6 @@ int main(void)
   DEFINE(S_FRAME_SIZE,         sizeof(struct pt_regs));
   BLANK();
 #ifdef CONFIG_CACHE_L2X0
-  DEFINE(L2X0_R_PHY_BASE,      offsetof(struct l2x0_regs, phy_base));
   DEFINE(L2X0_R_AUX_CTRL,      offsetof(struct l2x0_regs, aux_ctrl));
   DEFINE(L2X0_R_TAG_LATENCY,   offsetof(struct l2x0_regs, tag_latency));
   DEFINE(L2X0_R_DATA_LATENCY,  offsetof(struct l2x0_regs, data_latency));
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 7abde2c..728d644 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -985,8 +985,6 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
        if (!l2x0_base)
                return -ENOMEM;

-       l2x0_saved_regs.phy_base = res.start;
-
        data = of_match_node(l2x0_ids, np)->data;

        /* L2 configuration can only be changed if the cache is disabled */
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ