linux-kernel - Re: [PATCH 6/6] perf: Add dcacheline sort

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Fri, 16 May 2014 17:59:58 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	Don Zickus <dzickus@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	LKML <linux-kernel@...r.kernel.org>,
	Jiri Olsa <jolsa@...hat.com>,
	Namhyung Kim <namhyung@...il.com>,
	Andi Kleen <andi@...stfloor.org>
Subject: Re: [PATCH 6/6] perf: Add dcacheline sort

On Fri, May 16, 2014 at 04:09:59PM +0200, Stephane Eranian wrote:
> > +#define CACHE_LINESIZE       64
> I had something similar to your patch here in my original series for
> perf mem, but I never pushed it.
> I think this is a useful feature to have.
> However, I don't think you can hardcode the cache line size to 64.
> This is generic
> code. There may be architectures where the line size is different from 64.
> So I think you should add an option to change the default line size or provide
> an arch-specific definition.

# cat /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size     
64


Content of type "application/pgp-signature" skipped