linux-kernel - Re: [RFC Patch Part1 V1 00/30] use irqdomain to dynamically allocate IRQ for IOAPIC pin

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Message-ID: <alpine.DEB.2.02.1405200823300.5204@ionos.tec.linutronix.de>
Date:	Tue, 20 May 2014 08:35:35 +0900 (JST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Jiang Liu <jiang.liu@...ux.intel.com>
cc:	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Randy Dunlap <rdunlap@...radead.org>,
	Yinghai Lu <yinghai@...nel.org>,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Tony Luck <tony.luck@...el.com>,
	Joerg Roedel <joro@...tes.org>,
	Paul Gortmaker <paul.gortmaker@...driver.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	x86@...nel.org, LKML <linux-kernel@...r.kernel.org>,
	linux-pci@...r.kernel.org, linux-acpi@...r.kernel.org,
	sfi-devel@...plefirmware.org,
	Grant Likely <grant.likely@...aro.org>
Subject: Re: [RFC Patch Part1 V1 00/30] use irqdomain to dynamically allocate
 IRQ for IOAPIC pin

Jiang,

On Mon, 19 May 2014, Thomas Gleixner wrote:
> > We may build hierarchy irqdomains as below for x86,
> > [IOAPIC]      [MSI/MSI-x]  [HPET]  [DMAR] [Legacy]
> >     |            |           |       |       |
> >     v            v           v       |       |
> > [           Remapping           ]    |       |
> >                  |                   |       |
> >                  v                   v       v
> > [                   Root/vector                ]
> > 
> > For x86, irq_alloc_info_t structure will be used to host CPU mask,
> > device pointer, IOAPIC pin attributes, NUMA node info etc.
> 
> Do we really need to hand all of this down?

having recovered from a 24hr travel, I think we really only need to
hand down cpumask.

If you want to allocate a vector, all the vector domain needs to know
is the cpumask and the number of consecutive vectors you want to
allocate.

The IOAPIC pin attribute is only interesting inside the ioapic domain,
there is no need to have it elsewhere.

Numa node is encoded in the cpumask, IOW the node info selects only
bits for that node in the mask.

Same for the device. It's only relevant for setting up MSI[x] or
legacy PCI interrupts. But the underlying vector domain does not care
at all about it.

Thanks,

	tglx
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