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Message-ID: <5379626A.9020203@linux.intel.com>
Date: Mon, 19 May 2014 09:46:18 +0800
From: "Zhu, Lejun" <lejun.zhu@...ux.intel.com>
To: Daniel Glöckner <dg@...ix.com>,
aaron.lu@...el.com
CC: linus.walleij@...aro.org, gnurou@...il.com,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
bin.yang@...el.com
Subject: Re: gpio: Add support for Intel SoC PMIC (Crystal Cove)
On 5/17/2014 1:46 AM, Daniel Glöckner wrote:
> Hi Lejun,
>
> On Wed, May 14, 2014 at 11:44:07PM +0800, Zhu, Lejun wrote:
>> This patch adds support for the GPIO function in Crystal Cove.
>
> in our device ACPI makes use of "virtual" GPIOs that have numbers from
> 0x20 to 0x5E to change various bits in the PMIC. Do you know if this
> is officially supported by the INT33FD ACPI device or if it is a
> vendor hack?
>
> Daniel
>
Hi, sorry I'm quite familiar with ACPI. I know Aaron is looking at the
possibility to use these pins in Linux ACPI, but so far we don't have
any code.
Best Regards
Lejun
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