linux-kernel - [PATCHv5 2/2] pwm: sunxi: document OF bindings

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Message-Id: <1400523003-27082-3-git-send-email-alexandre.belloni@free-electrons.com>
Date:	Mon, 19 May 2014 20:10:03 +0200
From:	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
To:	Thierry Reding <thierry.reding@...il.com>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:	linux-pwm@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Subject: [PATCHv5 2/2] pwm: sunxi: document OF bindings

This is the documentation for the Allwinner Socs PWM bindings.

Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
---
 Documentation/devicetree/bindings/pwm/pwm-sunxi.txt | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sunxi.txt

diff --git a/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt b/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt
new file mode 100644
index 000000000000..9eda87e7d233
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt
@@ -0,0 +1,20 @@
+Allwinner PWM controller
+
+Required properties:
+  - compatible: should be one of:
+    - "allwinner,sun4i-a10-pwm"
+    - "allwinner,sun7i-a20-pwm"
+  - reg: physical base address and length of the controller's registers
+  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+    the cells format.
+  - clocks: from common clock binding, handle to the parent clock.
+
+Example:
+
+	pwm: pwm@...20e00 {
+		compatible = "allwinner,sun7i-a20-pwm";
+		reg = <0x01c20e00 0xc>;
+		clocks = <&osc24M>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
-- 
1.9.1

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