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Message-ID: <537B1D45.40705@linux.intel.com>
Date:	Tue, 20 May 2014 17:15:49 +0800
From:	"Zhu, Lejun" <lejun.zhu@...ux.intel.com>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>
CC:	linus.walleij@...aro.org, gnurou@...il.com,
	linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
	bin.yang@...el.com
Subject: Re: [PATCH] gpio: Add support for Intel SoC PMIC (Crystal Cove)



On 5/20/2014 4:30 PM, Mika Westerberg wrote:
> On Mon, May 19, 2014 at 01:39:33PM +0300, Mika Westerberg wrote:
>> On Wed, May 14, 2014 at 11:44:07PM +0800, Zhu, Lejun wrote:
>>> Devices based on Intel SoC products such as Baytrail have a Power
>>> Management IC. In the PMIC there are subsystems for voltage regulation,
>>> A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is called
>>> Crystal Cove.
>>>
>>> This patch adds support for the GPIO function in Crystal Cove.
>>
>> I have few comments as well in addition to comments from Linus and
>> Alexandre.
> 
> One more thing, I just remembered. The crystal cove GPIO driver is
> supposed to provide ACPI Operation Regions to the ASL code so you need
> to make sure you have ACPI handle associated with the device before you
> register your driver to the GPIO core.
> 

ACPI OpRegions is still under work, and will be submitted separately.
I'll fix the rest in v2. Thank you.

Best Regards
Lejun

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