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Message-ID: <CAHbNUh2+tWdDiL0uLXW_fG4SdpQ3kEchsDkVeK9XkqO7tgcgYg@mail.gmail.com>
Date:	Thu, 22 May 2014 17:44:28 +0530
From:	Tushar Behera <tushar.behera@...aro.org>
To:	Mark Brown <broonie@...nel.org>
Cc:	linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
	lkml <linux-kernel@...r.kernel.org>,
	devicetree <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Mike Turquette <mturquette@...aro.org>,
	Kukjin Kim <kgene.kim@...sung.com>,
	Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Marek Szyprowski <m.szyprowski@...sung.com>,
	Pankaj Dubey <pankaj.dubey@...sung.com>,
	Rahul Sharma <rahul.sharma@...sung.com>,
	Tomasz Figa <tomasz.figa@...il.com>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Tomasz Figa <t.figa@...sung.com>
Subject: Re: [PATCH 3/4] clk: samsung: Add driver to control CLKOUT line on
 Exynos SoCs

On 22 May 2014 17:31, Tomasz Figa <t.figa@...sung.com> wrote:
> On 22.05.2014 13:44, Tushar Behera wrote:
>> On 22 May 2014 16:04, Tomasz Figa <t.figa@...sung.com> wrote:
>>> On 22.05.2014 07:13, Tushar Behera wrote:
>>>> On 05/20/2014 10:13 PM, Tomasz Figa wrote:
>>>>> This patch introduces a driver that handles configuration of CLKOUT pin
>>>>> of Exynos SoCs that can be used to output certain clocks from inside of
>>>>> the SoC to a dedicated output pin.
>>>>>
>>>>> Signed-off-by: Tomasz Figa <t.figa@...sung.com>
>>>>> ---
>>>>>  .../devicetree/bindings/arm/samsung/pmu.txt        |  30 ++++
>>>>>  drivers/clk/samsung/Makefile                       |   1 +
>>>>>  drivers/clk/samsung/clk-exynos-clkout.c            | 153 +++++++++++++++++++++
>>>>>  3 files changed, 184 insertions(+)
>>>>>  create mode 100644 drivers/clk/samsung/clk-exynos-clkout.c
>>>>>
>>>>
>>>> [ ... ]
>>>>
>>>>> +    clkout->clk_table[0] = clk_register_composite(NULL, "clkout",
>>>>> +                            parent_names, parent_count, &clkout->mux.hw,
>>>>> +                            &clk_mux_ops, NULL, NULL, &clkout->gate.hw,
>>>>> +                            &clk_gate_ops, CLK_SET_RATE_PARENT
>>>>> +                            | CLK_SET_RATE_NO_REPARENT);
>>>>
>>>> Would you please remove CLK_SET_RATE_NO_REPARENT flag from here? Let me
>>>> know if you have reservations against this.
>>>
>>> The problem with clock reparenting is that there are certain parent
>>> clocks of CLKOUT, rate of which changes at runtime, e.g. clocks derived
>>> from APLL or bus clocks, which can be reconfigured by cpufreq or devfreq.
>>>
>>
>> +CC: Sylwester Nawrocki
>>
>> Okay. But in cases where there is only 1 valid parent clock provided
>> through DT (at the moment for Exynos5250/Exynos5420), would it be safe
>> to set that clock as the parent of CLKOUT?
>
> This is not something to rely on. I have simply omitted remaining CLKOUT
> parents on Exynos 5 SoCs, as I don't have any board with them on which I
> could test this. Eventually they will be added.
>
>> Otherwise, this clock is
>> not usable ATM.
>
> On many boards it is already configured properly by the bootloader.
> Although I don't see any reason why you couldn't reparent it in
> (board-specific) sound card driver right now.
>

Mark,

Is this (clock reparenting in sound card driver) an acceptable solution for you?


-- 
Tushar Behera
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