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Message-Id: <1400777250-17335-13-git-send-email-will.deacon@arm.com>
Date:	Thu, 22 May 2014 17:47:24 +0100
From:	Will Deacon <will.deacon@....com>
To:	linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:	arnd@...db.de, monstr@...str.eu, dhowells@...hat.com,
	broonie@...aro.org, benh@...nel.crashing.org, peterz@...radead.org,
	paulmck@...ux.vnet.ibm.com, Will Deacon <will.deacon@....com>,
	Helge Deller <deller@....de>
Subject: [PATCH v2 12/18] parisc: io: implement dummy relaxed accessor macros for writes

write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.

This patch adds dummy macros for the write accessors to parisc, in the
same vein as the dummy definitions for the relaxed read accessors.

Cc: Helge Deller <deller@....de>
Signed-off-by: Will Deacon <will.deacon@....com>
---
 arch/parisc/include/asm/io.h | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h
index 1f6d2ae7aba5..8cd0abf28ffb 100644
--- a/arch/parisc/include/asm/io.h
+++ b/arch/parisc/include/asm/io.h
@@ -217,10 +217,14 @@ static inline void writeq(unsigned long long q, volatile void __iomem *addr)
 #define writel	writel
 #define writeq	writeq
 
-#define readb_relaxed(addr) readb(addr)
-#define readw_relaxed(addr) readw(addr)
-#define readl_relaxed(addr) readl(addr)
-#define readq_relaxed(addr) readq(addr)
+#define readb_relaxed(addr)	readb(addr)
+#define readw_relaxed(addr)	readw(addr)
+#define readl_relaxed(addr)	readl(addr)
+#define readq_relaxed(addr)	readq(addr)
+#define writeb_relaxed(b, addr)	writeb(b, addr)
+#define writew_relaxed(w, addr)	writew(w, addr)
+#define writel_relaxed(l, addr)	writel(l, addr)
+#define writeq_relaxed(q, addr)	writeq(q, addr)
 
 #define mmiowb() do { } while (0)
 
-- 
1.9.2

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