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Message-ID: <537E30AF.4070501@zytor.com>
Date: Thu, 22 May 2014 10:15:27 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Will Deacon <will.deacon@....com>, linux-arch@...r.kernel.org,
linux-kernel@...r.kernel.org
CC: arnd@...db.de, monstr@...str.eu, dhowells@...hat.com,
broonie@...aro.org, benh@...nel.crashing.org, peterz@...radead.org,
paulmck@...ux.vnet.ibm.com, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>
Subject: Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros
for writes
On 05/22/2014 09:47 AM, Will Deacon wrote:
> write{b,w,l,q}_relaxed are implemented by some architectures in order to
> permit memory-mapped I/O accesses with weaker barrier semantics than the
> non-relaxed variants.
>
> This patch adds dummy macros for the read and write accessors to x86,
> which simply expand to the non-relaxed variants. Note that this
> strengthens the relaxed read accessors, since they are now ordered with
> respect to each other by way of a compiler barrier.
OK, do we want/need that compiler barrier? And you say "strengthens" -
strengthens with respect to what if we didn't have them before?
-hpa
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