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Date:	Fri, 23 May 2014 15:57:58 +0100
From:	Will Deacon <will.deacon@....com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"arnd@...db.de" <arnd@...db.de>,
	"monstr@...str.eu" <monstr@...str.eu>,
	"dhowells@...hat.com" <dhowells@...hat.com>,
	"broonie@...aro.org" <broonie@...aro.org>,
	"benh@...nel.crashing.org" <benh@...nel.crashing.org>,
	"peterz@...radead.org" <peterz@...radead.org>,
	"paulmck@...ux.vnet.ibm.com" <paulmck@...ux.vnet.ibm.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>
Subject: Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor
 macros for writes

On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote:
> On 05/23/2014 07:46 AM, Will Deacon wrote:
> > 
> > I would like the relaxed accessors to be ordered with respect to each other...
> > 
> > What do you think?
> > 
> 
> I think "I would like" isn't a very good motivation.  What are the
> semantics of these things supposed to be?  It seems more than a bit odd
> to require them to be ordered with respect to each other and everything
> else (which is what a memory clobber does) and then call them "relaxed".

I suggested some informal semantics in the cover letter:

  https://lkml.org/lkml/2014/4/17/269

Basically, if we define relaxed accesses not to be ordered against anything
apart from other accesses (relaxed or otherwise) to the same device, then
they become a tonne cheaper on arm/arm64/powerpc. Currently we have to
include expensive memory barriers in order to synchronise with accesses to
DMA buffers which is rarely needed.

For those requirements, I don't think we need the "memory" clobber for x86,
but would appreciate your views on this.

Will
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