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Message-ID: <1401054363.3958.28.camel@pasglop>
Date: Mon, 26 May 2014 07:46:03 +1000
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Will Deacon <will.deacon@....com>
Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
arnd@...db.de, monstr@...str.eu, dhowells@...hat.com,
broonie@...aro.org, peterz@...radead.org,
paulmck@...ux.vnet.ibm.com
Subject: Re: [PATCH v2 00/18] Cross-architecture definitions of relaxed MMIO
accessors
On Thu, 2014-05-22 at 17:47 +0100, Will Deacon wrote:
> A corollary to this is that mmiowb() probably needs rethinking. As it currently
> stands, an mmiowb() is required to order MMIO writes to a device from multiple
> CPUs, even if that device is protected by a lock. However, this isn't often used
> in practice, leading to PowerPC implementing both mmiowb() *and* synchronising
> I/O in spin_unlock.
>
> I would propose making the non-relaxed I/O accessors ordered with respect to
> LOCK/UNLOCK, leaving mmiowb() to be used with the relaxed accessors, if
> required, but would welcome thoughts/suggestions on this topic.
I agree on the proposed semantics, though for us that does mean we still need
that per-cpu flag tracking non-relaxed MMIO stores and corresponding added barrier
in unlock. Eventually, if the use of the relaxed accessors becomes pervasive
enough I suppose I can just make the ordered ones unconditionally do 2 barriers.
Cheers,
Ben.
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