linux-kernel - Re: [PATCH] RFT: pinctrl: sunxi: convert to GPIO irqchip helpers

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Message-ID: <20140527153456.GL4730@lukather>
Date:	Tue, 27 May 2014 17:34:56 +0200
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
	Alexandre Courbot <acourbot@...dia.com>
Subject: Re: [PATCH] RFT: pinctrl: sunxi: convert to GPIO irqchip helpers

Hi Linus,

On Fri, May 09, 2014 at 09:38:02AM +0200, Linus Walleij wrote:
> This switches the sunxi pinctrl driver over to using the generic
> gpiolib irqchip helpers for its chained irqs.
> 
> As the .to_irq() callback on the gpiochip was doing some function
> indexing this was moved over to the .irq_startup callback on the
> irqchip (where it belongs, since it is perfectly legal to request
> an irq from an irqchip without calling gpio_to_irq() first).
> 
> The gpio_chip was converted into a true member of the pinctrl
> struct instead of being a pointer to a separately allocated
> object, avoiding an unnecessary allocation and making it possible
> to use container_of() to get from the struct gpio_chip * back to
> the sunxi pinctrl state container.
> 
> Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
> ---
> Maxime, can you test this thing? And if it doesn't work, can you
> figure out what it is that I want you to do and do it ;-)
> This is done on top of your recently pulled sunxi series.


I've been quite late at testing this, I'm sorry, but I finally gave it
a try.

Besides the minor glitches here and there that were expected, I think
that it can't really work now given the state of gpiolib_irqchip.

The way this controller works depends on two cases:

  - On the older (the one on which we support interrupts) SoC:
    + we have 8 pin banks, almost all of them being at least able to
      be muxed to gpio in and out functions.
    + 32 of these 256 pins are actually muxable to another function
      that is the one to generate interrupts
    + The interrupt controller is a single 32 bits register, each bit
      being about one of these 32 pins, that are pretty much spread
      across the banks.
    + There's a single parent interrupt.

  - On the newer code (that is not supported yet) would be a bit
    easier to support, since the interrupt sources are grouped by
    banks. That means that we still have our 8 banks, but this time, 4
    banks are interrupt controllers. These banks support as much
    interrupts as there is pins in the banks, with a 1:1 mapping
    between the pin number and the interrupt number.

This is not something that looks to be well supported at the moment in
gpiolib_irqchip wrapper, especially since it seems to be making the
assumption that there's as much gpio than there is interrupts.

But I guess some of these changes are still useful, especially the
ones on the callbacks.

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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