linux-kernel - Re: [PATCH v2 14/18] sparc: io: implement dummy relaxed accessor macros for writes

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Date:	Thu, 29 May 2014 17:10:30 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	will.deacon@....com
Cc:	sam@...nborg.org, linux-arch@...r.kernel.org,
	linux-kernel@...r.kernel.org, arnd@...db.de, monstr@...str.eu,
	dhowells@...hat.com, broonie@...aro.org, benh@...nel.crashing.org,
	peterz@...radead.org, paulmck@...ux.vnet.ibm.com
Subject: Re: [PATCH v2 14/18] sparc: io: implement dummy relaxed accessor
 macros for writes

From: Will Deacon <will.deacon@....com>
Date: Fri, 23 May 2014 15:38:10 +0100

> On Thu, May 22, 2014 at 07:18:38PM +0100, Sam Ravnborg wrote:
>> On Thu, May 22, 2014 at 05:47:26PM +0100, Will Deacon wrote:
>> > write{b,w,l,q}_relaxed are implemented by some architectures in order to
>> > permit memory-mapped I/O accesses with weaker barrier semantics than the
>> > non-relaxed variants.
>> > 
>> > This patch adds dummy macros for the write accessors to sparc, in the
>> > same vein as the dummy definitions for the relaxed read accessors. The
>> > existing relaxed read{b,w,l} accessors are moved into asm/io.h, since
>> > they are identical between 32-bit and 64-bit machines.
>> > 
>> > Cc: "David S. Miller" <davem@...emloft.net>
>> > Signed-off-by: Will Deacon <will.deacon@....com>
>> Look good:
>> Acked-by: Sam Ravnborg <sam@...nborg.org>
> 
> Thanks, Sam.
> 
>> But you should wait for David's ack too.
> 
> Yeah, I still need to get buy-in on the semantics from the PPC folks
> anyway.

I'm fine with these changes so:

Acked-by: David S. Miller <davem@...emloft.net>

Unfortunately, whilst sparc64 could support the relaxed variants, there is
no easy way to implement this.

I/O addrs are simply physical addresses on sparc64, and we therefore do
loads and stores via the ASY_PHYS_BYPASS_EC_E* address spaces.  What
this address space means is "physical address", "bypass caches", "side
effect".

To do a relaxed variant we'd need something without the "side effect"
part, but no such ASI exists.

These are all page protection bits, so we could move to using virtual
mappings on I/O things, but that's so much overkill just for this I
think.

Besides there are bigger fish to fry on sparc64 :-)

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