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Message-Id: <2F6515B1-48FE-4ED6-908E-CC1CAD7AF403@codeaurora.org>
Date:	Mon, 2 Jun 2014 13:09:08 -0500
From:	Kumar Gala <galak@...eaurora.org>
To:	Grant Likely <grant.likely@...aro.org>
Cc:	Arnd Bergmann <arnd@...db.de>, Liviu Dudau <Liviu.Dudau@....com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Rob Herring <robherring2@...il.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	linux-arm-msm <linux-arm-msm@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Kishon Vijay Abraham I <kishon@...com>
Subject: Re: [PATCH 1/2] pci: Add IORESOURCE_BIT entry for PCIe ECAM resources.


On Jun 2, 2014, at 11:23 AM, Grant Likely <grant.likely@...aro.org> wrote:

> On Mon, 2 Jun 2014 10:40:30 -0500, Kumar Gala <galak@...eaurora.org> wrote:
>> 
>> On Jun 2, 2014, at 10:09 AM, Grant Likely <grant.likely@...aro.org> wrote:
>> 
>>> On Sat, 31 May 2014 20:41:04 +0200, Arnd Bergmann <arnd@...db.de> wrote:
>>>> On Saturday 31 May 2014 01:36:40 Liviu Dudau wrote:
>>>>> We would like to be able to describe PCIe ECAM resources as
>>>>> IORESOURCE_MEM blocks while distinguish them from standard
>>>>> memory resources. Add an IORESOURCE_BIT entry for this case.
>>>>> 
>>>>> Signed-off-by: Liviu Dudau <Liviu.Dudau@....com>
>>>> 
>>>> I still don't see any value in this at all. What is the advantage
>>>> of doing this opposed to just having a standardized 'reg' property
>>>> for a particular compatible string?
>>> 
>>> I'm inclined to agree. It doesn't seem appropriate to put config space
>>> in ranges, and the host controller binding is responsible for
>>> identifying how config space is memory mapped.
>>> 
>>> g.
>> 
>> I don’t agree when it comes to ECAM, but we can drop this for now
>> until someone really does that.
> 
> Okay, humor me then. What would a ranges property look like for ECAM? Do
> you have an example? I believe there would need to be a separate entry
> for each and every PCI device on the bus to get the config spaces to be
> contiguous.

The definition of ECAM is a 256M linear region with each 4k being a different bus/dev/func.

So the ranges would look something like:

   ranges = <0x00000000 0 0x00000000 0x0ff00000 0 0x10000000>   /* configuration space */

The reason I think allow an ECAM makes sense in ranges is because it allows for a direct IO read/write to CFG space (w/o any mapping) similar to what one would do for MEM space or IO.

> However, what do we do with the 2 cases that exist in upstream that
>> are using ranges for cfg space?
> 
> Ignore them in the core code? Make the specific host controller handle
> them I would think.

I just meant, should we ‘break’ their DTs and move them from using ranges to reg?

- k

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