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Message-ID: <20140605221301.GQ5961@tbergstrom-lnx.Nvidia.com>
Date: Fri, 6 Jun 2014 01:13:01 +0300
From: Peter De Schrijver <pdeschrijver@...dia.com>
To: Stephen Warren <swarren@...dotorg.org>
CC: Russell King <linux@....linux.org.uk>,
Thierry Reding <thierry.reding@...il.com>,
Andrew Morton <akpm@...ux-foundation.org>,
"Linus Walleij" <linus.walleij@...aro.org>,
Wolfram Sang <wsa@...-dreams.de>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 4/5] ARM: tegra: Add efuse and apbmisc bindings
On Thu, Jun 05, 2014 at 08:41:55PM +0200, Stephen Warren wrote:
> On 06/05/2014 07:09 AM, Peter De Schrijver wrote:
> > Add efuse and apbmisc bindings for Tegra20, Tegra30, Tegra114 and Tegra124.
>
> > diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
>
> > + apbmisc@...00800 {
> > + compatible = "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc";
>
> Is the Tegra114 APBMISC register layout 100% a backwards-compatible
> superset of that in Tegra20? For both registers the code currently uses
> *and* all possible registers the code could ever use? Since the APB MISC
> is a bit of a dumping ground for random registers, that feels unlikely,
> but perhaps it's possible.
For all I can see it is. At least for the registers the kernel is likely to
use.
Cheers,
Peter.
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