linux-kernel - Re: [PATCH 2/3] clocksource: exynos

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Date:	Thu, 5 Jun 2014 09:55:15 +0200
From:	Vincent Guittot <vincent.guittot@...aro.org>
To:	Doug Anderson <dianders@...omium.org>
Cc:	Kukjin Kim <kgene.kim@...sung.com>,
	Tomasz Figa <t.figa@...sung.com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Chirantan Ekbote <chirantan@...omium.org>,
	David Riley <davidriley@...omium.org>,
	Olof Johansson <olof@...om.net>,
	linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
	Mandeep Singh Baines <msb@...omium.org>,
	Andrew Bresticker <abrestic@...omium.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	LAK <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/3] clocksource: exynos_mct: cache mct upper count

On 4 June 2014 19:30, Doug Anderson <dianders@...omium.org> wrote:
> From: Mandeep Singh Baines <msb@...omium.org>
>
> Saves one register read.  Note that the upper count only changes every
> ~178 seconds with a 24MHz source clock, so it's likely it hasn't
> changed from call to call.

Hi Doug,

Have you checked that the time saved in using a 32bits counter instead
of a 64bits one is not lost in the handle of the wrap of sched_clock
which occurs every 178s instead of never ?

sched_clock_poll function will be called every 178s

Regards,
Vincent


>
> Before: 1323852 us for 1000000 gettimeofday in userspace
> After:  1173084 us for 1000000 gettimeofday in userspace
>
> Note that even with this change the CPU is in exynos_frc_read() more
> than 2% of the time in real world profiles of ChromeOS.  That
> indicates that it's important to optimize.
>
> Signed-off-by: Mandeep Singh Baines <msb@...omium.org>
> Signed-off-by: Andrew Bresticker <abrestic@...omium.org>
> Signed-off-by: Doug Anderson <dianders@...omium.org>
> ---
>  drivers/clocksource/exynos_mct.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
> index ba3a683..7cbe4aa 100644
> --- a/drivers/clocksource/exynos_mct.c
> +++ b/drivers/clocksource/exynos_mct.c
> @@ -167,8 +167,8 @@ static void exynos4_mct_frc_start(u32 hi, u32 lo)
>
>  static inline cycle_t notrace _exynos4_frc_read(void)
>  {
> -       unsigned int lo, hi;
> -       u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
> +       u32 lo, hi;
> +       static u32 hi2;
>
>         do {
>                 hi = hi2;
> --
> 2.0.0.526.g5318336
>
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