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Message-ID: <20140605080418.GH3213@twins.programming.kicks-ass.net>
Date:	Thu, 5 Jun 2014 10:04:18 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	linux-kernel@...r.kernel.org, mingo@...e.hu, ak@...ux.intel.com,
	jolsa@...hat.com, zheng.z.yan@...el.com,
	maria.n.dimakopoulou@...il.com
Subject: Re: [PATCH 4/9] perf/x86: add cross-HT counter exclusion
 infrastructure

On Wed, Jun 04, 2014 at 11:34:13PM +0200, Stephane Eranian wrote:
> @@ -499,6 +530,7 @@ do {									\
>   */
>  #define PMU_FL_NO_HT_SHARING	0x1 /* no hyper-threading resource sharing */
>  #define PMU_FL_HAS_RSP_1	0x2 /* has 2 equivalent offcore_rsp regs   */
> +#define PMU_FL_EXCL_CNTRS	0x4 /* has exclusive counter requirements  */

the EXLC thing is HT specific too, right? How about HT_EXCL or so?



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