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Date:	Fri, 06 Jun 2014 09:09:47 -0700
From:	James Bottomley <James.Bottomley@...senPartnership.com>
To:	Davidlohr Bueso <davidlohr@...com>
Cc:	peterz@...radead.org, mingo@...nel.org, mpatocka@...hat.com,
	torvalds@...ux-foundation.org, jason.low2@...com,
	waiman.long@...com, jejb@...isc-linux.org,
	paulmck@...ux.vnet.ibm.com, dave.anglin@...l.net, aswin@...com,
	linux-kernel@...r.kernel.org, linux-parisc@...r.kernel.org
Subject: Re: [PATCH 2/2] locking/rwsem: Disable optimistic spinning for
 PA-RISC

On Fri, 2014-06-06 at 08:55 -0700, Davidlohr Bueso wrote:
> PA-RISC's cmpxchg is not save against normal stores and the code used
> for optimistic spinning is known broken because of this.

What about all the other identified architectures?  The problem is that
unless you can do an atomic Read Modify Write on your architecture, you
have to implement our exchange primitives with locking, and that makes
you unsafe against stores  We happen to be the architecture that
detected this, but I thought we agreed sparc32, metag, tile32, arc and
possibly hexagon have this problem.

Rather than naming all the failing architectures, we probably want an 

ARCH_NO_ATOMIC_RMW

symbol which they select to indicate they can't do atomic exchange and
then you make

depends on SMP && RWSEM_XCHGADD_ALGORITHM &!ARCH_NO_ATOMIC_RMW

So they can all self select (especially if more come crawling out of the
woodwork).

James


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