| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1402393493-3559-2-git-send-email-jbe@pengutronix.de> Date: Tue, 10 Jun 2014 11:44:47 +0200 From: Juergen Borleis <jbe@...gutronix.de> To: linux-kernel@...r.kernel.org Cc: Dmitry Eremin-Solenikov <dbaryshkov@...il.com>, David Woodhouse <dwmw2@...radead.org>, kernel@...gutronix.de Subject: [PATCH 1/7] bq27425: fix register offset for SOC on bq27425 The SOC register is at offset 0x1C according to its datasheet. Due to the fact the access routine subtracts BQ27425_REG_OFFSET from this value we need 0x20 to reach the real offset at 0x1C. This offset is valid for the following devices: - BQ27425-G1, firmware device info 0x0410 - BQ27425-G2a, firmware device info 0x0425 Signed-off-by: Juergen Borleis <jbe@...gutronix.de> --- drivers/power/bq27x00_battery.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/bq27x00_battery.c b/drivers/power/bq27x00_battery.c index b309713..f3de29e 100644 --- a/drivers/power/bq27x00_battery.c +++ b/drivers/power/bq27x00_battery.c @@ -72,7 +72,7 @@ /* bq27425 register addresses are same as bq27x00 addresses minus 4 */ #define BQ27425_REG_OFFSET 0x04 -#define BQ27425_REG_SOC 0x18 /* Register address plus offset */ +#define BQ27425_REG_SOC 0x20 /* Register address plus offset */ #define BQ27000_RS 20 /* Resistor sense */ #define BQ27x00_POWER_CONSTANT (256 * 29200 / 1000) -- 2.0.0.rc2 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists