linux-kernel - Re: [PATCH 1/3] clk: exynos-audss: Keep the parent of mout

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Date:	Thu, 12 Jun 2014 12:59:23 +0530
From:	Tushar Behera <tushar.b@...sung.com>
To:	Mike Turquette <mturquette@...aro.org>
Cc:	lkml <linux-kernel@...r.kernel.org>,
	ML Devicetree <devicetree@...r.kernel.org>,
	linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
	ML Arch-Arm <linux-arm-kernel@...ts.infradead.org>,
	Tomasz Figa <t.figa@...sung.com>,
	Russell King <linux@....linux.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Mark Rutland <mark.rutland@....com>,
	Pawel Moll <pawel.moll@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Kukjin Kim <kgene.kim@...sung.com>,
	Kevin Hilman <khilman@...aro.org>,
	Doug Anderson <dianders@...gle.com>,
	Shaik Ameer Basha <shaik.ameer@...sung.com>
Subject: Re: [PATCH 1/3] clk: exynos-audss: Keep the parent of mout_audss
 always enabled

On Wed, Jun 11, 2014 at 10:20 PM, Mike Turquette <mturquette@...aro.org> wrote:
> Quoting Tushar Behera (2014-06-10 22:32:17)
>> When the output clock of AUDSS mux is disabled, we are getting kernel
>> oops while doing a clk_get() on other clocks provided by AUDSS. Though
>> user manual doesn't specify this dependency, we came across this issue
>> while disabling the parent of AUDSS mux clocks.
>
> Hi Tushar,
>
> Can you help me understand better what the actual problem is? What is
> the root cause of the kernel oops?

Currently AUDSS mux has two parents, XXTI crystal and MAU_EPLL clock.
As per observation, when the output of AUDSS mux is gated, we are not
able to do any operation on the clocks provided by MAU block (mostly
the clocks used by ADMA and audio blocks).

>
> You mention calling clk_get on child clocks of the AUDSS mux fails, but
> I cannot imagine why. How can the enable/disable state of a clock affect
> the ability to clk_get other clocks?
>

I might have a little vogue while updating the commit message
(mentioning about clk_get which surely is only a s/w operation), but
there is definitely some issue with handling those clocks under given
scenario.

I am on leave till end of this week, so I will update you more with
the logs on Monday.

Thanks,
--
Tushar
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