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Message-ID: <CAGVrzcZmakEpNW=vGtsb+OmzU_J4hJNoM1sUAoYNsaju_YzGwQ@mail.gmail.com>
Date: Thu, 12 Jun 2014 12:13:29 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Cc: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Jason Cooper <jason@...edaemon.net>,
Thomas Gleixner <tglx@...utronix.de>,
Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH] irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive
2014-06-09 11:05 GMT-07:00 Florian Fainelli <f.fainelli@...il.com>:
> The driver was configuring the interrupt handler for the Level-2
> interrupts to be "level" triggered while they are in fact "edge"
> triggered. Fix this by using the correct handler.
>
> Reported-by: Brian Norris <computersforpeace@...il.com>
> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
Jason, Thomas, this driver just got merged into 3.16-rc0, can you
carry this fix such that it gets into a future 3.16-rc? Thanks!
> ---
> drivers/irqchip/irq-brcmstb-l2.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
> index 8ee2a36d5840..c15c840987d2 100644
> --- a/drivers/irqchip/irq-brcmstb-l2.c
> +++ b/drivers/irqchip/irq-brcmstb-l2.c
> @@ -150,7 +150,7 @@ int __init brcmstb_l2_intc_of_init(struct device_node *np,
>
> /* Allocate a single Generic IRQ chip for this node */
> ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
> - np->full_name, handle_level_irq, clr, 0, 0);
> + np->full_name, handle_edge_irq, clr, 0, 0);
> if (ret) {
> pr_err("failed to allocate generic irq chip\n");
> goto out_free_domain;
> --
> 1.9.1
>
--
Florian
--
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