linux-kernel - Re: [PATCH] vfio/pci: Add extra test for extended capabilities

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Message-ID: <jpgy4x1vp5f.fsf@nelium.bos.redhat.com>
Date:	Thu, 12 Jun 2014 16:39:08 -0400
From:	Bandan Das <bsd@...hat.com>
To:	Alex Williamson <alex.williamson@...hat.com>
Cc:	linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH] vfio/pci: Add extra test for extended capabilities

Alex Williamson <alex.williamson@...hat.com> writes:

> On Thu, 2014-06-12 at 16:12 -0400, Bandan Das wrote:
>> Alex Williamson <alex.williamson@...hat.com> writes:
>> 
>> > If the PCI core set cfg_size isn't large enough for extended
>> > capabilities, then they're not there.  Extended config space may be
>> > inaccessible due to a PCI bridge, in which case cfg_size may be cut
>> > short.
>> 
>> Just curious, is this part of the spec or just a convention ? I mean
>> could there be devices with quirks ?
>
> The PCIe bridge spec indicates that PCIe-to-PCI bridges should handle
> extended config accesses as an unsupported request.  But as in 78916b00,
> we've seen that's not always the case.  This just makes us trust
> PCI-core before the capabilities we find on the device.  The current
> quirk in the referenced commit is for a relatively uncommon topology,
> but never rule out that we couldn't have a device quirked to avoid
> touching extended config space too.  Thanks,

Ok, Understood, Thanks!

> Alex 
>
>> > Signed-off-by: Alex Williamson <alex.williamson@...hat.com>
>> > ---
>> >  drivers/vfio/pci/vfio_pci_config.c |   13 +++++++++----
>> >  1 file changed, 9 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c
>> > index 83cd157..4a62a37 100644
>> > --- a/drivers/vfio/pci/vfio_pci_config.c
>> > +++ b/drivers/vfio/pci/vfio_pci_config.c
>> > @@ -1027,8 +1027,11 @@ static int vfio_cap_len(struct vfio_pci_device *vdev, u8 cap, u8 pos)
>> >  
>> >  		if (PCI_X_CMD_VERSION(word)) {
>> >  			/* Test for extended capabilities */
>> > -			pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &dword);
>> > -			vdev->extended_caps = (dword != 0);
>> > +			if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) {
>> > +				pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE,
>> > +						      &dword);
>> > +				vdev->extended_caps = (dword != 0);
>> > +			}
>> >  			return PCI_CAP_PCIX_SIZEOF_V2;
>> >  		} else
>> >  			return PCI_CAP_PCIX_SIZEOF_V0;
>> > @@ -1041,8 +1044,10 @@ static int vfio_cap_len(struct vfio_pci_device *vdev, u8 cap, u8 pos)
>> >  		return byte;
>> >  	case PCI_CAP_ID_EXP:
>> >  		/* Test for extended capabilities */
>> > -		pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &dword);
>> > -		vdev->extended_caps = (dword != 0);
>> > +		if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) {
>> > +			pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &dword);
>> > +			vdev->extended_caps = (dword != 0);
>> > +		}
>> >  
>> >  		/* length based on version */
>> >  		if ((pcie_caps_reg(pdev) & PCI_EXP_FLAGS_VERS) == 1)
>> >
>> > --
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