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Message-ID: <20140613131008.GK21178@lahna.fi.intel.com>
Date: Fri, 13 Jun 2014 16:10:08 +0300
From: Mika Westerberg <mika.westerberg@...ux.intel.com>
To: Chew Chiau Ee <chiau.ee.chew@...el.com>
Cc: Eric Miao <eric.y.miao@...il.com>,
Russell King <linux@....linux.org.uk>,
Haojian Zhuang <haojian.zhuang@...il.com>,
Mark Brown <broonie@...nel.org>,
linux-arm-kernel@...ts.infradead.org, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] spi/pxa2xx: fix incorrect SW mode chipselect setting
for BayTrail LPSS SPI
On Fri, Jun 13, 2014 at 11:57:25PM +0800, Chew Chiau Ee wrote:
> From: Chew, Chiau Ee <chiau.ee.chew@...el.com>
>
> It was observed that after module removal followed by insertion,
> the SW mode chipselect is not properly set. Thus causing transfer
> failure due to incorrect CS toggling.
>
> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@...el.com>
Acked-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
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