linux-kernel - Re: [PATCH] ARM: EXYNOS: mcpm: Don't rely on firmware's secondary_cpu

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Date:	Fri, 13 Jun 2014 08:10:18 -0700
From:	Doug Anderson <dianders@...omium.org>
To:	Chander Kashyap <k.chander@...sung.com>
Cc:	Kukjin Kim <kgene.kim@...sung.com>,
	Nicolas Pitre <nicolas.pitre@...aro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	Kevin Hilman <khilman@...aro.org>,
	Andrew Bresticker <abrestic@...omium.org>,
	Inderpal Singh <inderpal.s@...sung.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Chander Kashyap <chander.kashyap@...aro.org>,
	"olof@...om.net" <olof@...om.net>,
	Tushar Behera <trblinux@...il.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
	Thomas Abraham <thomas.ab@...sung.com>,
	Abhilash Kesavan <a.kesavan@...sung.com>,
	Javier Martinez Canillas <javier.martinez@...labora.co.uk>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>
Subject: Re: [PATCH] ARM: EXYNOS: mcpm: Don't rely on firmware's secondary_cpu_start

Chander,

On Fri, Jun 13, 2014 at 4:54 AM, Chander Kashyap <k.chander@...sung.com> wrote:
> This patch is effectively changing the mcpm_entry_point address from
> nsbase + 0x1c to nsbase + 0x8
>
> Hence while integrating with mainline u-boot we need to take care for
> new mcpm_entry_point address.
>
> With Chromebook it works straightforward.

Can you explain more and point to the code that is using the nsbase +
0x1c?  Specifically the only code I see that uses the nsbase + 0x1c is
the code that is located at nsbase, which is the code we're
overwriting here.  I'd imagine you're using U-Boot code that looks
something like the bits that start at code_base here:

https://chromium.googlesource.com/chromiumos/third_party/u-boot/+/ce358daf5069f1dc145b0f9d403cfbb028271807/arch/arm/cpu/armv7/exynos/lowlevel.S

With my kernel change you can completely eliminate U-Boot's
installation of this code (or keep it, it makes no difference).

-Doug
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