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Message-ID: <1402917796-31574-15-git-send-email-r.sricharan@ti.com>
Date: Mon, 16 Jun 2014 16:53:14 +0530
From: Sricharan R <r.sricharan@...com>
To: <linux-omap@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <tony@...mide.com>, <santosh.shilimkar@...com>, <nm@...com>,
<rnayak@...com>, <linux@....linux.org.uk>, <r.sricharan@...com>,
<tglx@...utronix.de>, <jason@...edaemon.net>, <joe@...ches.com>
Subject: [PATCH V3 14/16] irqchip: crossbar: introduce centralized check for crossbar write
From: Nishanth Menon <nm@...com>
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon <nm@...com>
Signed-off-by: Sricharan R <r.sricharan@...com>
---
drivers/irqchip/irq-crossbar.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index c46e14b..ef613c4 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -84,10 +84,20 @@ static inline int allocate_free_irq(int cb_no)
return -ENODEV;
}
+static inline bool needs_crossbar_write(irq_hw_number_t hw)
+{
+ if (hw > GIC_IRQ_START)
+ return true;
+
+ return false;
+}
+
static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
+ if (needs_crossbar_write(hw))
+ cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
+
return 0;
}
@@ -106,7 +116,7 @@ static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
- if (hw > GIC_IRQ_START) {
+ if (needs_crossbar_write(hw)) {
cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
cb->write(hw - GIC_IRQ_START, cb->safe_map);
}
--
1.7.9.5
--
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