lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20140616134908.GI16758@arm.com>
Date:	Mon, 16 Jun 2014 14:49:08 +0100
From:	Will Deacon <will.deacon@....com>
To:	Wang Weidong <wangweidong1@...wei.com>
Cc:	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"gregory.clement@...e-electrons.com" 
	<gregory.clement@...e-electrons.com>,
	"nico@...aro.org" <nico@...aro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: Thumb-2: Fix out-of-range offset for Thumb-2 in,
 proc-macros.S

On Tue, Jun 10, 2014 at 08:00:01AM +0100, Wang Weidong wrote:
> The STR Instruction Encoding T4 points that the <imm> is in the
> range 0-255.So split the instruction into two for Thumb-2. Just
> like commit 874d5d3ccc("ARM: 6623/1: Thumb-2: Fix out-of-range
> offset for Thumb-2 in proc-v7.S").
> 
> Signed-off-by: Wang Weidong <wangweidong1@...wei.com>
> ---
>  arch/arm/mm/proc-macros.S | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
> index ee1d805..63f710c 100644
> --- a/arch/arm/mm/proc-macros.S
> +++ b/arch/arm/mm/proc-macros.S
> @@ -252,7 +252,9 @@
>  	tst	r3, #L_PTE_PRESENT | L_PTE_YOUNG	@ present and young?
>  	movne	r2, #0				@ no -> fault
>  
> -	str	r2, [r0, #2048]!		@ hardware version
> + ARM(	str	r2, [r0, #2048]! 		) @ hardware version
> + THUMB( add	r0, r0, #2048 			)
> + THUMB( str	r2, [r0] 			)
>  	mov	ip, #0
>  	mcr	p15, 0, r0, c7, c10, 1		@ clean L1 D line
>  	mcr	p15, 0, ip, c7, c10, 4		@ data write barrier

AFAICT this is in xscale_set_pte_ext_epilogue which should only be built as
ARM. Are you seeing a real issue here?

Will
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ