lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Mon, 16 Jun 2014 15:17:17 +0100
From:	Will Deacon <will.deacon@....com>
To:	Catalin Marinas <catalin.marinas@....com>
Cc:	Leif Lindholm <leif.lindholm@...aro.org>,
	"msalter@...hat.com" <msalter@...hat.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"steve.capper@...aro.org" <steve.capper@...aro.org>
Subject: Re: [PATCH] arm64: Add flush_cache_vmap call in __early_set_fixmap

On Mon, Jun 09, 2014 at 02:38:59PM +0100, Catalin Marinas wrote:
> On Mon, Jun 09, 2014 at 02:24:29PM +0100, Leif Lindholm wrote:
> > On Mon, Jun 09, 2014 at 12:03:56PM +0100, Catalin Marinas wrote:
> > > A quick grep through the kernel shows that we have other set_pte() calls
> > > without additional dsb() like create_mapping(), I think kvm_set_pte() as
> > > well.
> > > 
> > > So I'm proposing an alternative patch (which needs some benchmarking as
> > > well to see if anything is affected, maybe application startup time).
> > 
> > I'm happy for any fix which can be included in 3.16.
> 
> Steve Capper made a point about performance. He'll follow up.
> 
> > But is the dsb(ishst) sufficient? We need to also prevent reads from
> > overtaking the set_pte(). i.e.:
> > 
> > ptr = early_ioremap(phys_addr, size);
> > if (ptr && strcmp(ptr, "magic") == 0)
> >    ...
> > 
> > Does it not require a dsb(ish)?
> 
> So doesn't early_ioremap() now include a dsb() after set_pte() with my
> patch?
> 
> BTW, according to the ARM ARM (and confirmed with architects), we needs
> DSB+ISB even if we have just a data access (rather than instruction
> fetch). We have to revisit both 32 and 64-bit code for this.

The impact of this really depends on whether or not we need to sandwich
DSB+ISB between every update to a set of page tables (possibly plumbing
together different levels) or whether the ISB can just come at the end.

If the latter case is true, we just need to add something for kernel
mappings, which should be pretty low overhead,

Will
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists