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Date:	Wed, 18 Jun 2014 01:29:00 +0200
From:	Thierry Reding <thierry.reding@...il.com>
To:	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc:	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	linux-pwm@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCHv5 2/2] pwm: sunxi: document OF bindings

On Mon, May 19, 2014 at 08:10:03PM +0200, Alexandre Belloni wrote:
> This is the documentation for the Allwinner Socs PWM bindings.

"SoCs".

> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt b/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt
[...]
> +Allwinner PWM controller

"Allwinner SoC"?

> +
> +Required properties:
> +  - compatible: should be one of:
> +    - "allwinner,sun4i-a10-pwm"
> +    - "allwinner,sun7i-a20-pwm"
> +  - reg: physical base address and length of the controller's registers
> +  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
> +    the cells format.
> +  - clocks: from common clock binding, handle to the parent clock.

This is a sentence, so should start with a capital letter.

Thierry

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