linux-kernel - [PATCH v2 06/20] clk: sunxi: Fix rate

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Message-Id: <1403016777-15121-7-git-send-email-wens@csie.org>
Date:	Tue, 17 Jun 2014 22:52:43 +0800
From:	Chen-Yu Tsai <wens@...e.org>
To:	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	Lee Jones <lee.jones@...aro.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Rob Herring <robh+dt@...nel.org>,
	Mike Turquette <mturquette@...aro.org>,
	Emilio Lopez <emilio@...pez.com.ar>,
	Linus Walleij <linus.walleij@...aro.org>
Cc:	Chen-Yu Tsai <wens@...e.org>, linux-serial@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	Boris BREZILLON <boris.brezillon@...e-electrons.com>,
	Luc Verhaegen <libv@...net.be>
Subject: [PATCH v2 06/20] clk: sunxi: Fix rate_recalc for sun6i PLL1

PLL1 on sun6i is a factor clock with the N multiplier factor starting
from 1. Set the .n_from_one field in the clock data to match.

Signed-off-by: Chen-Yu Tsai <wens@...e.org>
---
 drivers/clk/sunxi/clk-sunxi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index a38c799..dc2176f 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -420,6 +420,7 @@ static struct clk_factors_config sun6i_a31_pll1_config = {
 	.kwidth = 2,
 	.mshift = 0,
 	.mwidth = 2,
+	.n_from_one = 1,
 };
 
 static struct clk_factors_config sun4i_pll5_config = {
-- 
2.0.0

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