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Message-Id: <1403016777-15121-2-git-send-email-wens@csie.org>
Date: Tue, 17 Jun 2014 22:52:38 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Samuel Ortiz <sameo@...ux.intel.com>,
Lee Jones <lee.jones@...aro.org>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Rob Herring <robh+dt@...nel.org>,
Mike Turquette <mturquette@...aro.org>,
Emilio Lopez <emilio@...pez.com.ar>,
Linus Walleij <linus.walleij@...aro.org>
Cc: Chen-Yu Tsai <wens@...e.org>, linux-serial@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>,
Boris BREZILLON <boris.brezillon@...e-electrons.com>,
Luc Verhaegen <libv@...net.be>
Subject: [PATCH v2 01/20] serial: 8250_dw: Add optional reset control support
The Allwinner A31 and A23 SoCs have a reset controller
maintaining the UART in reset by default.
This patch adds optional reset support to the driver.
Signed-off-by: Chen-Yu Tsai <wens@...e.org>
---
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt | 1 +
drivers/tty/serial/8250/8250_dw.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index f13f1c5..cb9af84 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
@@ -7,6 +7,7 @@ Required properties:
- clock-frequency : the input clock frequency for the UART.
Optional properties:
+- resets : phandle to the parent reset controller.
- reg-shift : quantity to shift the register offsets by. If this property is
not present then the register offsets are not shifted.
- reg-io-width : the size (in bytes) of the IO accesses that should be
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 51b307a..cb1b3dc 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -26,6 +26,7 @@
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/clk.h>
+#include <linux/reset.h>
#include <linux/pm_runtime.h>
#include <asm/byteorder.h>
@@ -59,6 +60,7 @@ struct dw8250_data {
int last_mcr;
int line;
struct clk *clk;
+ struct reset_control *rst;
struct uart_8250_dma dma;
};
@@ -408,6 +410,10 @@ static int dw8250_probe(struct platform_device *pdev)
uart.port.uartclk = clk_get_rate(data->clk);
}
+ data->rst = devm_reset_control_get_optional(&pdev->dev, NULL);
+ if (!IS_ERR(data->rst))
+ reset_control_deassert(data->rst);
+
data->dma.rx_chan_id = -1;
data->dma.tx_chan_id = -1;
data->dma.rx_param = data;
@@ -451,6 +457,9 @@ static int dw8250_remove(struct platform_device *pdev)
serial8250_unregister_port(data->line);
+ if (!IS_ERR(data->rst))
+ reset_control_assert(data->rst);
+
if (!IS_ERR(data->clk))
clk_disable_unprepare(data->clk);
--
2.0.0
--
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