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Message-ID: <53A2C52C.6020606@ti.com>
Date:	Thu, 19 Jun 2014 14:10:36 +0300
From:	Tero Kristo <t-kristo@...com>
To:	Kishon Vijay Abraham I <kishon@...com>,
	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-omap@...r.kernel.org>, <linux-pci@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
CC:	<arnd@...db.de>, <tony@...mide.com>, <jg1.han@...sung.com>,
	Keerthy <j-keerthy@...com>, Rajendra Nayak <rnayak@...com>,
	Paul Walmsley <paul@...an.com>
Subject: Re: [PATCH v2 06/18] ARM: dts: DRA7: Add divider table to optfclk_pciephy_div
 clock

On 05/29/2014 09:38 AM, Kishon Vijay Abraham I wrote:
> From: Keerthy <j-keerthy@...com>
>
> Add divider table to optfclk_pciephy_div clock. The Documentation
> for divider clock can be found at ../clock/ti/divider.txt

This patch requires a better changelog. Why is the change done, any TRM 
refs etc.?

-Tero

>
> Cc: Rajendra Nayak <rnayak@...com>
> Cc: Tero Kristo <t-kristo@...com>
> Cc: Paul Walmsley <paul@...an.com>
> Signed-off-by: Keerthy <j-keerthy@...com>
> Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
> ---
>   arch/arm/boot/dts/dra7xx-clocks.dtsi |    1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
> index c767687..55e95c5 100644
> --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
> @@ -1170,6 +1170,7 @@
>   		clocks = <&apll_pcie_ck>;
>   		#clock-cells = <0>;
>   		reg = <0x021c>;
> +		ti,dividers = <2>, <1>;
>   		ti,bit-shift = <8>;
>   		ti,max-div = <2>;
>   	};
>

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