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Message-ID: <20140623154751.GE8178@tassilo.jf.intel.com>
Date: Mon, 23 Jun 2014 08:47:51 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>,
LKML <linux-kernel@...r.kernel.org>,
"mingo@...e.hu" <mingo@...e.hu>, Joe Mario <jmario@...hat.com>,
Don Zickus <dzickus@...hat.com>, Jiri Olsa <jolsa@...hat.com>,
Arnaldo Carvalho de Melo <acme@...hat.com>
Subject: Re: [PATCH 1/2] perf/x86: update Haswell PEBS event constraints
> Filters? You mean the inv,cmask etc? Well, we have the Intel provided
> 'cycle' events that use them, so exposing them makes sense and allows
> such experimentation when we need another such alias.
The SDM explicitely discourages it.
The 'cycle' event is now handled explicitely, but for others it is still
not ok.
-Andi
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