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Message-ID: <20140623053249.GD2666@pratyush-vbox>
Date: Mon, 23 Jun 2014 11:02:49 +0530
From: Pratyush Anand <pratyush.anand@...com>
To: Arnd Bergmann <arnd@...db.de>,
Santosh Shilimkar <santosh.shilimkar@...com>,
Murali Karicheri <m-karicheri2@...com>
Cc: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Marek Vasut <marex@...x.de>,
Russell King <linux@....linux.org.uk>,
Pawel Moll <pawel.moll@....com>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Jingoo Han <jg1.han@...sung.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"ABRAHAM, KISHON VIJAY" <kishon@...com>,
Richard Zhu <r65037@...escale.com>,
Rob Herring <robh+dt@...nel.org>,
Randy Dunlap <rdunlap@...radead.org>,
Mohit KUMAR DCG <Mohit.KUMAR@...com>,
Grant Likely <grant.likely@...aro.org>,
Kumar Gala <galak@...eaurora.org>,
Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v2 0/8] Add Keystone PCIe controller driver
On Sat, Jun 21, 2014 at 03:05:30AM +0800, Arnd Bergmann wrote:
> On Friday 20 June 2014 13:11:37 Santosh Shilimkar wrote:
> > >
> > Arnd suggestion was to have the version 3.65 code in generic place since
> > its IP specific and just in case some other vendor using the same version
> > can leverage the code.
Sorry, I do not follow PCIe mailing list these days, doing something else
now. So coming to this topic a bit delayed.
> >
> > Concern here seems toe really those name of the files. I can't think of
> > any other appropriate name.
>
> We should definitely keep the version in the DT "compatible" strings
> wherever we know it. Regarding a better file name, I have no idea.
In my opinion, we do not need any of dw-v3_65 files, as code in these
files will not be usable by other vendors.
Anything which is implemented in application space, will not be same
across all IP users. For example, MSI0_IRQ_ENABLE_SET has been defined
at offset 0x108 in keystone PCIe application space.Other vendor may
not have this register at the same offset. Moreover, other vendors are
not even obliged to implement MSI Enable signals in same way, so
internal bit definition of the register may change.
Therefore code is not reusable if all register offset and bit
definitions are not same across vendors. So, in case of DW driver none
of the code which are accessed using va_app_base should go to common
area.
Regards
Pratyush
>
> Arnd
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